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rev. 1.3 october 2012 www.aosmd.com page 1 of 18 AOZ1232-01 28v/6a synchronous ezbuck tm regulator general description the AOZ1232-01 is a high-efficiency, easy-to-use dc/dc synchronous buck regulator that operates up to 28v. the device is capable of supplying 6a of continuous output current with an output voltage adjustable down to 0.8v (1.0%). the AOZ1232-01 integrates an internal linear regulator to generate 5.3v v cc from input. if input voltage is lower than 5.3v, the linear regulator operates at low drop- output mode, which allows the v cc voltage is equal to input voltage minus the drop-output voltage of the internal linear regulator. a proprietary constant on-time pwm control with input feed-forward results in ultra-fast transient response while maintaining relatively consta nt switching frequency over the entire input voltage range. the switching frequency can be externally programmed up to 1mhz. the device features multiple protection functions such as v cc under-voltage lockout, cycle- by-current lim it, output over-voltage protection, short-circuit protection, as well as thermal shutdown. the AOZ1232-01 is available in a 5mm x 5mm qfn-30l package and is rated over a -40c to +85c ambient temperature range. features ? wide input voltage range ? 2.7v to 28v ? 6a continuous output current ? output voltage adjustable down to 0.8v (1.0%) ? low r ds(on) internal nfets ? 35m ? high-side ? 12m ? low-side sr fet ? ? constant on-time with input feed-forward ? programmable frequency up to 1mhz ? internal 5.3v/20ma linear regulator ? ceramic capacitor stable ? adjustable soft start ? power good output ? integrated bootstrap diode ? cycle-by-cycle current limit ? short-circuit protection ? thermal shutdown ? thermally enhanced 5mm x 5mm qfn-30l package applications ? portable computers ? compact desktop pcs ? servers ? graphics cards ? set-top boxes ? lcd tvs ? cable modems ? point-of-load dc/dc converters ? telecom/networking/datacom equipment
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 2 of 18 typical application for v in = 12v or above typical application for v in = 5v AOZ1232-01 input = 12v or above output c3 100f r1 r3 100k r2 c2 22f c5 0.1f in ton ain analog ground power ground power good off on vcc pgood en ss c ss r ton c4 1f bst lx fb agnd pgnd l1 AOZ1232-01 input = 5v output c3 100f r1 r3 100k r2 c2 22f c5 0.1f in ton analog ground power ground power good off on vcc pgood en ss c ss r ton c4 1f bst lx fb agnd pgnd l1 ain
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 3 of 18 typical application for high light load effici ency requirement or v in = 2.7v ~ 6.5v ordering information aos green products use reduced levels of halogens, and are also rohs compliant. please visit www.aosmd.com/media/ aosgreenpolicy.pdf for additional information. part number ambient temperature range package environmental aoz1232qi-01 -40c to +85c 30-pin 5mm x 5mm qfn green product AOZ1232-01 input c3 100f r1 r3 100k r2 c2 22f c5 0.1f in ton analog ground power ground power good off on vcc pgood en ss c ss r ton c4 1f bst lx fb agnd pgnd l1 ain 5v output
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 4 of 18 pin configuration pin description 1 30 29 28 27 26 25 24 23 8 9 10 11 12 13 14 2 3 4 5 6 7 pgood in in in in pgnd pgnd pgnd ss agnd vcc bst pgnd lx lx lx en pfm agnd fb ton ain 30-pin 5mm x 5mm qfn (top view) 22 21 20 18 17 16 15 lx lx lx pgnd pgnd pgnd pgnd pgnd lx in agnd 19 pin number pin name pin function 1 pgood power good signal output. pgood is an open -drain output used to indicate the status of the output voltage. it is internally pulled low when th e output voltage is 10% lower than the nominal regulation voltage for 50s (typical time) or 15% higher than the nominal regulation voltage. pgood is pulled lo w during soft-start and shut down. 2en enable input. the AOZ1232-01 is enabled when en is pulled high. the device shuts down when en is pulled low. 3pfm pfm selection input. connect pfm pin to vcc/vin for forced pwm operation. connect pfm pin to ground for pfm operation to improve light load efficiency. 4, 29 agnd analog ground. 5fb feedback input. adjust the output voltage wi th a resistive voltage-divider between the regulator?s output and agnd. 6 ton on-time setting input. connect a resistor between vin and ton to set the on time. 7 ain supply input for analog functions. 8, 9, 10, 11 in supply input. in is the regulator input. all in pins must be connected together. 12, 13, 14, 15, 16, 17, 18, 19, 26 pgnd power ground. 20, 21, 22, 23, 24, 25 lx switching node. 27 bst bootstrap capacitor connection. the AOZ1232-01 includes an internal bootstrap diode. connect an external capacitor between bst and lx as shown in the typical application diagrams. 28 vcc output for internal linear regulator. bypass vcc to agnd with a 1f ceramic capacitor. place the capacitor close to vcc pin. 30 ss soft-start time setting pin. connect a capacitor between ss and agnd to set the soft-start time.
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 5 of 18 absolute maximum ratings exceeding the absolute maximum ratings may damage the device. note: 1. devices are inherently esd s ensitive, handling precautions are required. human body model rating: 1.5k ? in series with 100pf. 2. lx to pgnd transient (t< 20ns) ------ -7v to v in + 7v. maximum operating ratings the device is not guaranteed to operate beyond the maximum operating ratings. note: 1. connect v cc and ain to external 5v for v in = 2.7v ~ 6.5v application. parameter rating in, ain, ton, pfm to agnd -0.3v to 30v lx to agnd -2v to 30v bst to agnd -0.3v to 36v ss, pgood, fb, en to agnd -0.3v to 6v pgnd to agnd -0.3v to +0.3v junction temperature (t j ) +150c storage temperature (t s ) -65c to +150c esd rating (1) 2kv parameter rating supply voltage (v in )2.7v (1) to 28v output voltage range 0.8v to 0.85*v in ambient temperature (t a ) -40c to +85c package thermal resistance hs mosfet 25c/w ls mosfet 20c/w pwm controller 50c/w symbol parameter conditions min. typ. max units v in in supply voltage 2.7 28 v v uvlo under-voltage lockout threshold of v cc v cc rising v cc falling 3.2 4.0 3.7 4.4 v i q quiescent supply current of v cc i out = 0, v fb = 1.0v, v en > 2v 23 ma i off shutdown supply current v en = 0v 120 ? a v fb feedback voltage t a = 25c t a = 0c to 85c 0.792 0.788 0.800 0.800 0.808 0.812 v load regulation 0.5 % line regulation 1% i fb fb input bias current 200 na enable v en en input threshold off threshold on threshold 2.5 0.5 v v en_hys en input hysteresis 100 mv pfm control v pfm pfm input threshold pfm mode threshold force pwm threshold 2.5 0.5 v v pfmhys pfm input hysteresis 100 mv modulator t on on time r ton = 100k ? , v in = 12v r ton = 100k ? , v in = 24v 200 250 150 300 ns t on _ min minimum on time 100 ns t off _ min minimum off time 250 ns electrical characteristics t a = 25c, v in = 12v, en = 5v, unless otherwise specified. specifications in bold indicate a temperature range of -40c to +85c.
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 6 of 18 soft-start i ss _ out ss source current v ss = 0, c ss = 0.001 ? f to 0.1 ? f 7 10 15 ? a power good signal v pg_low pgood low voltage i ol = 1ma 0.5 v pgood leakage current 1 ? a v pgh v pgl pgood threshold fb rising fb falling 12 -12 15 -10 18 -8 % pgood threshold hysteresis 3 % t pg_l pgood fault delay time (fb falling) 50 ? s under voltage and over voltage protection v pl under voltage threshold fb falling -30 -25 -20 % t pl under voltage delay time 128 ? s v ph over voltage threshold fb rising 12 15 18 % t uv_lx under voltage shutdown blanking time v in = 12v, v en = 0v, v cc = 5v 20 ms power stage output r ds(on) high-side nfet on-resistance v in = 12v, v cc = 5v 35 45 m ? high-side nfet leakage v en = 0v, v lx = 0v 10 ? a r ds(on) low-side nfet on-resistance v lx = 12v, v cc = 5v 12 15 m ? low-side nfet leakage v en = 0v 10 ? a over-current and thermal protection i lim valley current limit 6 a thermal shutdown threshold t j rising t j falling 145 100 c symbol parameter conditions min. typ. max units
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 7 of 18 functional block diagram ton generator isense ilim_valley error comp ilim comp 0.8v isense (ac) fb decode otp reference & bias bst pg logic lx agnd pgnd isense (dc) isense (ac) current information processing vcc in ain pgood uvlo ldo ton timer q toff_min s r q timer q ton pfm fb ss en vcc light load threshold isense light load comp
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 8 of 18 5s/div normal operation full load (6a) start-up full load short load transient 1.2a (20%) to 4.8a (80%) 500s/div 1ms/div 1ms/div vlx 10v/div ilx 2a/div vo ripple 20mv/div vlx 10v/div ilx 2a/div vo 1v/div en 5v/div vlx 10v/div io 5a/div vo 500mv/div vlx 10v/div ilx 5a/div vo ripple 100mv/div typical performance characteristics circuit of typical application. t a = 25c, v in = 12v, v out = 1.5v, fs = 300khz unless otherwise specified.
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 9 of 18 detailed description the AOZ1232-01 is a high-efficiency, easy-to-use, synchronous buck regulator optimized for notebook computers. the regulator is capable of supplying 6a of continuous output current with an output voltage adjustable down to 0.8v. the programmable operating frequency range of 100khz to 1mhz enables optimizing the configuration for pcb area and efficiency. the input voltage of AOZ1232-01 can be as low as 2.7v. the highest input voltage of AOZ1232-01 can be 28v. constant on-time pwm with input feed-forward control scheme results in ultra-fast transient response while maintaining relatively constant switching frequency over the entire input range. true ac current mode control scheme guarantees the regulator can be stable with a ceramic output capacitor. the switching frequency can be externally programmed up to 1mhz. protection features include v cc under-voltage lockout, valley current limit, output over voltage and under voltage protection, short-circuit protection, and thermal shutdown. the AOZ1232-01 is available in 30-pin 5mm x 5mm qfn package. input power architecture the AOZ1232-01 integrates an internal linear regulator to generate 5.3v v cc from input. if input voltage is lower than 5.3v, the linear regulator operates at low drop- output mode; the v cc voltage is equal to input voltage minus the drop-output voltage of internal linear regulator. enable and soft start the AOZ1232-01 has external soft start feature to limit in-rush current and ensure the output voltage ramps up smoothly to regulation voltage. a soft start process begins when v cc rises to 4.0v and voltage on en pin is high. an internal current source charges the external soft-start capacitor; the fb voltage follows the voltage of soft-start pin (v ss ) when it is lower than 0.8v. when v ss is higher than 0.8v, the fb voltage is regulated by internal precise band-gap voltage (0.8v). the soft-start time can be calculated by the following formula: t ss ( ? s) = 330 x c ss (nf) if c ss is 1nf, the soft-start time will be 330s; if c ss is 10nf, the soft-start time will be 3.3ms. constant-on-time pwm control with input feed-forward the control algorithm of AOZ1232-01 is constant-on-time pwm control with input feed-forward. the simplified control schematic is shown in figure 1. figure 1. simplified control schematic of AOZ1232-01 the high-side switch on-time is determined solely by a one-shot whose pulse width can be programmed by one external resistor and is inversely proportional to input voltage (in). the one-shot is triggered when the internal 0.8v is lower than the combined information of fb voltage and the ac current information of inductor, which is processed and obtained through the sensed lower-side mosfet current once it turns on. the added ac current information can help the stability of constant-on time control even with pure ceramic output capacitors, which have very low esr. the ac current information has no dc offset, which does not cause offset with output load change, which is fundamentally different from other v 2 constant-on time control schemes. the constant-on-time pwm control architecture is a pseudo-fixed frequency with input voltage feed-forward. the internal circuit of AOZ1232-01 sets the on-time of high-side switch inversely proportional to the in. to achieve the flux balance of inductor, the buck converter has the equation: 0.8v fb voltage/ ac current information comp programmable one-shot in pwm + C t on 26.3 10 12 ? r ton ? ?? ? ? v in v ?? ---------------------------------------------------------------- = (1) f sw v out v in t on ? -------------------------- - = (2)
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 10 of 18 once the product of v in x t on is constant, the switching frequency keeps constant and is independent with input voltage. an external resistor between the in and ton pin sets the switching frequency according to the following equation: a further simplified equation will be: if v out is 1.8v, r ton is 137k ? , the switching frequency will be 500khz. this algorithm results in a nearly constant switching frequency despite the lack of a fixed-frequency clock generator. true current mode control the constant-on-time control scheme is intrinsically unstable if output capacitor?s esr is not large enough as an effective current-sense re sistor. ceramic capacitors usually cannot be used as output capacitor. the AOZ1232-01 senses the low-side mosfet current and processes it into dc and ac current information using aos proprietary technique. the ac current information is decoded and added on the fb pin on phase. with ac current information, the stability of constant-on-time control is significantly improved even without the help of output capacitor?s esr, and thus the pure ceramic capacitor solution can be applicable. the pure ceramic capacitor soluti on can significantly reduce the output ripple (no esr caused overshoot and undershoot) and less board area design. valley current-limit protection the AOZ1232-01 uses the valley current-limit protection by using r dson of the lower mosfet current sensing. to detect real current information, a minimum constant- off (150ns typical) is implemented after a constant-on time. if the current exceeds the valley current-limit threshold, the pwm controller is not allowed to initiate a new cycle. the actual peak current is greater than the valley current-limit threshold by an amount equal to the inductor ripple current. therefore, the exact current-limit characteristic and maximum load capability are a function of the inductor value as well as input and output voltages. the curr ent limit will keep the low-side mosfet on and will not allow another high-side on- time, until the current in the low-side mosfet reduces below the current limit. figure 2 shows the inductor current during the current limit. figure 2. inductor current after 128 ? s (typical), the AOZ1232-01 considers this is a true failed condition and therefore, turns-off both high- side and low-side mosfets and latches off. when triggered, only the enable can restart the AOZ1232-01 again. output voltage under-voltage protection if the output voltage is lower than 25% by over-current or short circuit, the AOZ1232-01 will wait for 128 ? s (typical) and turns-off both high-side and low-side mosfets and latches off. when triggered, only the enable can restart the AOZ1232-01 again. output voltage over-voltage protection the threshold of ovp is set 15% higher than 800mv. when the v fb voltage exceeds the ovp threshold, high- side mosfet is turned-off and low-side mosfets is turned-on until v fb voltage is lower than 800mv. power good output the power good (pgood) output, which is an open drain output, requires the pull-up resistor. when the output voltage is 10% below than the nominal regulation voltage for 50 ? s (typical), the pgood is pulled low. when the output voltage is 15% higher than the nominal regulation voltage, the pgood is also pulled low. when combined with the under-voltage-protection circuit, this current limit method is effective in almost every circumstance. in forced-pwm mode, the AOZ1232-01 also implements a negative current limit to prevent excessive reverse inductor currents when vout is sinking current. f sw v out 10 12 ? 26.3 r ton ? --------------------------------- = (3) f sw khz ?? 38000 v out ? v ?? r ton k ? ?? ---------------------------------------------- - = (4) inductor current time ilim
rev. 1.3 october 2012 www.aosmd.com page 11 of 18 AOZ1232-01 application information the basic AOZ1232-01 application circuit is shown in pages 2 and 3. component selection is explained below. input capacitor the input capacitor must be connected to the in pins and pgnd pin of the AOZ1232-01 to maintain steady input voltage and filter out the pulsing input current. a small decoupling capacitor, usually 1 ? f, should be connected to the vcc pin and agnd pin for stable operation of the AOZ1232-01. the voltage rating of input capacitor must be greater than maximum input voltage plus ripple voltage. the input ripple voltage can be approximated by equation below: since the input current is discontinuous in a buck converter, the current stress on the input capacitor is another concern when selecting the capacitor. for a buck circuit, the rms value of i nput capacitor current can be calculated by: if let m equal the conversion ratio: the relation between the input capacitor rms current and voltage conversion ratio is calculated and shown in figure 3. it can be seen that when v o is half of v in , c in it is under the worst current stress. the worst current stress on c in is 0.5 x i o . figure 3. i cin vs. voltage conversion ratio for reliable operation and best performance, the input capacitors must have curr ent rating higher than i cin-rms at worst operating conditions. ceramic capacitors are preferred for input capacitors because of their low esr and high ripple current rating. depending on the application circuits, other low esr tantalum capacitor or aluminum electrolytic capacitor may also be used. when selecting ceramic capacitors, x5r or x7r type dielectric ceramic capacitors are preferred for their better temperature and voltage characteristics. note that the ripple current rating from capacitor manufactures is based on certain amount of life time. further de-rating may be necessary for practical design requirement. inductor the inductor is used to supply constant current to output when it is driven by a swit ching voltage. for given input and output voltage, inductance and switching frequency together decide the inductor ripple current, which is: the peak inductor current is: high inductance gives low inductor ripple current but requires a larger size inductor to avoid saturation. low ripple current reduces inductor core losses. it also reduces rms current through inductor and switches, which results in less conduct ion loss. usually, peak to peak ripple current on inductor is designed to be 30% to 50% of output current. when selecting the inductor, make sure it is able to handle the peak current without saturation even at the highest operating temperature. the inductor takes the highest current in a buck circuit. the conduction loss on the i nductor needs to be checked for thermal and efficiency requirements. surface mount inductors in different shapes and styles are available from coilcraft, elytone and murata. shielded inductors are small and radiate less emi noise, but they do cost more than unshielded inductors. the choice depends on emi requirement, price and size. i o fc in ? ----------------- 1 v o v in -------- - ? ?? ?? ?? v o v in -------- - ? ? i cin_rms i o v o v in -------- - 1 v o v in -------- - ? ?? ?? ?? ? = v o v in -------- - m = ? i l v o fl ? ---------- - 1 v o v in -------- - ? ?? ?? ?? ? = i lpeak i o ? i l 2 -------- + = 0 0.1 0.2 0.3 0.4 0.5 0 0.5 1 m i cin_rms (m) i o
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 12 of 18 output capacitor the output capacitor is selected based on the dc output voltage rating, output ripple voltage specification and ripple current rating. the selected output capacitor must have a higher rated voltage specification than the maximum desired output voltage including ripple. de-rating needs to be considered for long term reliability. output ripple voltage specification is another important factor for selecting the output capacitor. in a buck con- verter circuit, output ripple voltage is determined by inductor value, switching frequency, output capacitor value and esr. it can be calculated by the equation below: where , c o is output capacitor value and esr co is the equivalent series resistor of output capacitor. when a low esr ceramic capacitor is used as output capacitor, the impedance of the capacitor at the switching frequency dominates. output ripple is mainly caused by capacitor value and inductor ripple current. the output ripple voltage calculation can be simplified to: if the impedance of esr at switching frequency dominates, the output ripple voltage is mainly decided by capacitor esr and inductor ripple current. the output ripple voltage calculation can be further simplified to: for lower output ripple voltage across the entire operating temperature range, x5r or x7r dielectric type of ceramic, or other low esr tantalum are recommended to be used as output capacitors. in a buck converter, output capacitor current is continuous. the rms current of output capacitor is decided by the peak to peak inductor ripple current. it can be calculated by: usually, the ripple current rating of the output capacitor is a smaller issue because of the low current stress. when the buck inductor is selected to be very small and inductor ripple current is high, the output capacitor could be overstressed. thermal management and layout consideration in the AOZ1232-01 buck regulator circuit, high pulsing current flows through two circuit loops. the first loop starts from the input capacitors, to the vin pin, to the lx pins, to the filter inductor, to the output capacitor and load, and then returns to the input capacitor through ground. current flows in the first loop when the high side switch is on. the second loop starts from the inductor, to the output capacitors and load, to the low side switch. current flows in the second loop when the low side switch is on. in pcb layout, minimizing the two loops area reduces the noise of this circuit and im proves efficiency. a ground plane is strongly recommended to connect the input capacitor, output capacitor and pgnd pin of the AOZ1232-01. in the AOZ1232-01 buck regulator circuit, the major power dissipating components are the AOZ1232-01 and output inductor. the total power dissipation of the con- verter circuit can be measured by input power minus out- put power. the power dissipation of inductor can be approximately calculated by output current and dcr of inductor and output current. the actual junction temperature can be calculated with power dissipation in the AOZ1232-01 and thermal impedance from junction to ambient. the maximum junction temperature of AOZ1232-01 is 150oc, which limits the maximum load current capability. the thermal performance of the AOZ1232-01 is strongly affected by the pcb layout. extra care should be taken by users during design process to ensure that the ic will operate under the recommended environmental conditions. ? v o ? i l esr co 1 8 fc o ? ? ------------------------- + ?? ?? ? = ? v o ? i l 1 8 fc o ? ? ------------------------- ? = ? v o ? i l esr co ? = i co_rms ? i l 12 ---------- = p total_loss v in i in v o i o ? ? ? = p inductor_loss i o 2 r inductor 1.1 ? ? = t junction p total_loss p inductor_loss ? ??? ja ? =
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 13 of 18 several layout tips are listed below for the best electric and thermal performance. 1. the lx pins and pad are connected to internal low side switch drain. they are low resistance thermal conduction path and most noisy switching node. connect a large copper plane to lx pin to help ther- mal dissipation. 2. the in pins and pad are connected to internal high side switch drain. they are also low resistance ther- mal conduction path. connect a large copper plane to in pins to help thermal dissipation. 3. do not use thermal relief connection on the pgnd pin. pour a maximized copper area on the pgnd pin to help thermal dissipation. 4. input capacitors should be connected to the in pin and the pgnd pin as close as possible to reduce the switching spikes. 5. decoupling capacitor c vcc should be connected to vcc and agnd as close as possible. 6. voltage divider r1 and r2 should be placed as close as possible to fb and agnd. 7. r ton should be connected as close as possible to pin 6 (ton pin). 8. a ground plane is preferred; pin 26 (pgnd) is con- nected to the ground plane through via. 9. keep sensitive signal traces such as feedback trace far away from the lx pins. 10. pour copper plane on all unused board area and connect it to stable dc nodes, like vin, gnd or vout. pgnd 12 pgnd 13 pgnd 14 19 pgnd 18 pgnd 17 pgnd 16 pgnd 15 pgnd pgnd 1 2 p g nd 13 p g nd 14 19 pg nd 18 pg nd 1 7 pg nd 16 pg nd 15 pg nd in in in in lx lx lx agnd ss vcc bst pgnd 1 2 3 4 5 6 7 p g oo d e n agn d f b t o n 8 9 10 11 23 24 25 26 27 28 29 22 21 20 lx lx lx lx in agn d 30 rton c in l x c o u t v o v o cvc c g n d vc c c b r1 r 2 ain pfm l x l x l x 2 3 2 4 2 5 2 2 2 1 2 0 l x l x l x l x v o in i n i n i n 7 8 9 1 0 1 1 i n ain agnd d 4 n d 2 9 ag n d
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 14 of 18 package dimensions, qfn 5x5, 30 lead ep3_s 22 23 1 30 14 15 7 8 22 23 30 14 15 7 8 top view side view l1 l2 e1 e1 e2 d3 d2 l4 l3 l5 l l5 l5 d/2 d b a e e/2 2 index area (d/2xe/2) aaa c 2x 2x e a3 4 a a1 a3 seating plane c 30 x b c bbb m ab 3 1 d1 e e/2 pin#1 dia l1 l5 d3/2 c0.35x45? 2e a3/2 e/2 a3/2 notes: ccc c ddd c aaa c 1. all dimensions are in millimeters. 2. the location of the terminal #1 identifier and terminal numbering convention conforms to jedec publication 95 spp-002. 3. dimension b applies to metallized terminal and is measured between 0.20mm and 0.35mm from the terminal tip. if the terminal has the optional radius on the other end of the terminal, the dimension b should not be measured in that radius area.
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 15 of 18 package dimensions, qfn 5x5, 30 lead ep3_s (continued) unit: mm unit: mm 0.30x45 0.386 1.494 0.116 1.88 2.32 0.71 0.44 0.500 ref 0.22 0.22 0.25 0.22 0.22 22 23 1 30 15 7 8 14 3.76 1.996 1.17 0.25 2.50 2.50 2.50 2.50 0.25 0.75 0.80 1.25 0.30x45 0.436 0.622 0.116 0.975 0.39 0.500 ref 0.27 0.27 recommended stencil design 0.25 0.27 0.27 22 23 1 30 15 7 8 14 1.04 0.873 1.07 0.22 2.50 2.50 2.50 2.50 0.25 0.75 0.80 0.27 0.14 0.52 0.81 0.15 0.15 0.37 0.27
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 16 of 18 package dimensions, qfn 5x5, 30 lead ep3_s (continued) symbols min. typ. max. dimensions in millimeters dimensions in inches 0.39 l3 0.007 0.003 0.166 0.066 l2 0.021 0.017 0.013 0.536 0.436 0.336 l1 0.006 0.004 0.197 bsc 0.000 0.031 0.001 0.035 0.002 0.039 1.00 0.05 0.90 0.02 2.22 0.80 0.00 a a1 e d2 d1 5.00 bsc bbb aaa l a3 0.20 ref 0.35 0.25 0.20 b 0.008 0.008 ref 0.010 0.014 0.50 0.40 0.30 0.020 0.020 bsc 0.50 bsc d 5.00 bsc 0.197 bsc e1 ccc ddd 0.004 0.003 0.15 0.10 0.10 0.08 0.016 0.012 1.294 1.494 1.394 e 2.12 2.32 0.97 1.07 1.17 e2 1.796 1.996 1.896 0.49 0.29 0.76 l4 0.86 0.66 0.27 l5 0.37 0.17 d3 l3 l2 l1 a a1 e d2 d1 bbb aaa l a3 b d e1 ccc ddd e e2 l4 l5 d3 3.56 3.66 3.76 0.140 0.144 0.148 0.087 0.083 0.091 0.038 0.042 0.046 0.051 0.059 0.055 0.110 0.118 0.114 0.019 0.015 0.011 0.034 0.030 0.026 0.015 0.011 0.007 symbols min. typ. max.
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 17 of 18 tape and reel dimensions , qfn 5x5, 30 lead ep3_s carrier tape reel tape size 12mm reel size ?330 m ?330.0 2.0 n ?79.0 1.0 unit: mm g m w1 s k h n w v r trailer tape 300mm min. 75 empty pockets components tape orientation in pocket leader tape 500mm min. 125 empty pockets h ?13.0 0.5 w 12.4 +2.0/-0.0 w1 17.0 +2.6/-1.2 k 10.5 0.2 s 2.0 0.5 g r v leader/trailer and orientation unit: mm p1 d1 p2 b0 p0 d0 e2 e1 e a0 feeding direction package a0 b0 k0 e e1 e2 d0 d1 p0 p1 p2 t 5.25 0.10 0.10 5.25 0.10 1.10 1.50 1.50 12.00 0.10 1.75 0.05 5.50 0.10 8.00 0.10 4.00 0.05 2.00 0.05 0.30 +0.3 +0.10/-0 min. qfn 5x5 (12mm) t k0
AOZ1232-01 rev. 1.3 october 2012 www.aosmd.com page 18 of 18 part marking part number code assembly lot code fab & assembly location year & week code z1232qi1 faywlt as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. legal disclaimer alpha and omega semiconductor makes no representation s or warranties with respect to the accuracy or completeness of the informat ion provided herein and takes no liabilitie s for the consequences of use of such information or any product described herein. alpha and omega semiconductor reserves the right to make changes to such information at any time without further notice. this document does not constitute the grant of any intellectual property rights or representation of non-infringement of any third party?s intellectual property rights. life support policy alpha and omega semiconductor products ar e not authorized for use as critical components in life support devices or systems.

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